This invention relates to intracomputer communications architectures and more particularly to bus structures of specialized computer systems. Specifically the invention relates to computer systems useful in telecommunications systems which require real-time routing and switching of digitized traffic. A particular application is in the field of ISDN data switching at telephone central offices.
There is a need for a high-speed bus for a telecommunications switch for digital communication applications wherein the primary usage is switching data between an external source or input resource and an external output or destination resource. Known bus topologies assume that communications of input resources and output resources is primarily with a central processing unit and not with one another. Addressing schemes are typically based on references to memory space associated with the central processing unit. As a consequence, the special problems associated with high-speed communication between resources have not been fully considered or addressed.
One issue is availability. A failed receiver on a bus can effectively destroy a bus. In a digital telephone switch, peak data rate or loading is a primary design issue. Data cannot be lost or delayed excessively even under peak load conditions.
What is needed is a bus topology and input/output structure which is capable of receiving, buffering and forwarding digital information with a minimum of delay even under extreme loading conditions.